Product Datasheet Search Results:
- EP20K300EFC672-1
- Altera
- IC FPGA 408 I/O 672FBGA
- EP20K300EFC672-1N
- Altera
- IC FPGA 408 I/O 672FBGA
- EP20K300EFC672-1X
- Altera
- IC FPGA 408 I/O 672FBGA
- EP20K300EFC672-1XN
- Altera Corporation
- LOADABLE PLD, 1.68 ns, PBGA672
Product Details Search Results:
Altera.com/EP20K300EFC672-1
{"Category":"Integrated Circuits (ICs)","Number of LABs/CLBs":"1152","Product Photos":"DS-672FBGA205-2_0","Family":"Embedded - FPGAs (Field Programmable Gate Array)","Number of Logic Elements/Cells":"11520","Series":"APEX-20KE\u00ae","Standard Package":"40","Number of I/O":"408","Supplier Device Package":"672-FBGA (27x27)","Datasheets":"APEX 20K Device Family Data Sheet 672-FBGA Pkg Info Virtual JTAG Megafuntion User Guide","Total RAM Bits":"147456","Number of Gates":"728000","Operating Temperature":"0\u00b...
2008 Bytes - 05:30:05, 16 January 2026
Altera.com/EP20K300EFC672-1N
{"Category":"Integrated Circuits (ICs)","Number of LABs/CLBs":"1152","Product Photos":"DS-672FBGA205-2_0","Family":"Embedded - FPGAs (Field Programmable Gate Array)","Number of Logic Elements/Cells":"11520","Series":"APEX-20KE\u00ae","Standard Package":"40","Number of I/O":"408","Supplier Device Package":"672-FBGA (27x27)","Datasheets":"APEX 20K Device Family Data Sheet 672-FBGA Pkg Info Virtual JTAG Megafuntion User Guide","Total RAM Bits":"147456","Number of Gates":"728000","Operating Temperature":"0\u00b...
2014 Bytes - 05:30:05, 16 January 2026
Altera.com/EP20K300EFC672-1X
{"Category":"Integrated Circuits (ICs)","Number of LABs/CLBs":"1152","Product Photos":"DS-672FBGA205-2_0","Family":"Embedded - FPGAs (Field Programmable Gate Array)","Number of Logic Elements/Cells":"11520","Series":"APEX-20KE\u00ae","Standard Package":"40","Number of I/O":"408","Supplier Device Package":"672-FBGA (27x27)","Datasheets":"APEX 20K Device Family Data Sheet 672-FBGA Pkg Info Virtual JTAG Megafuntion User Guide","Total RAM Bits":"147456","Number of Gates":"728000","Operating Temperature":"0\u00b...
2019 Bytes - 05:30:05, 16 January 2026
Altera.com/EP20K300EFC672-1XN
{"Terminal Finish":"TIN SILVER COPPER","Terminal Pitch":"1 mm","Clock Freq-Max (fclk)":"160 MHz","Programmable Logic Type":"LOADABLE PLD","Terminal Form":"BALL","Operating Temperature-Max":"85 Cel","Output Function":"MACROCELL","Supply Voltage-Nom (Vsup)":"1.8 V","Temperature Grade":"OTHER","Package Shape":"SQUARE","Status":"ACTIVE","Lead Free":"Yes","Operating Temperature-Min":"0.0 Cel","Package Body Material":"PLASTIC/EPOXY","Propagation Delay (tpd)":"1.68 ns","Number of Functions":"1","EU RoHS Compliant"...
1639 Bytes - 05:30:05, 16 January 2026
Documentation and Support
Use our online request for specific proposed solutions or send your technical question directly to a product specialist at request:
| File Name | File Size (MB) | Document | MOQ | Support |
|---|---|---|---|---|
| EP20K300EFC672-1XN.pdf | 0.70 | 1 | Request | |
| EP20K300EFC672-1N.pdf | 0.70 | 1 | Request | |
| EP20K300EFC672-1X.pdf | 0.70 | 1 | Request | |
| EP20K300EFC672-1.pdf | 0.70 | 1 | Request |







