. The Set and Reset inputs are asynchronous. * Outputs Directly Interface to CMOS, NMOS, and TTL * Operating Voltage Range: 2.0 to 6.0 V * Low Input Current: 1.0 A * High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION SL74HC74N Plastic SL74HC74D SOIC TA = -55 to 125 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM FUNCTION TABLE Inputs PIN 14 =VCC PIN 7 = GND Outputs Set Reset Clock Data Q Q L H X X H L H L X X L H X * H H* L L X H H H H L H H L L H H H L X No Change H H H X No Change H H X No Change *Both outputs will remain high as long as Set and Reset are low, but the output states are unpredictable if Set and Reset go high simultaneously. X = don't care SLS System Logic Semiconductor SL74HC74 MAXIMUM RATINGS * Symbol Parameter Value Unit -0.5 to +7.0 V VCC DC Supply Voltage (Referenced to GND) VIN DC Input Voltage (Referenced to GND) -1.5 to VCC +1.5 V DC Output Voltage (Referenced to GND) -0.5 to VCC +0.5 V DC Input Current, per Pin 20 mA DC Output Current, per Pin 25 mA