Datasheet.Directory
Home
Grid
ChatGPT2
Introduction
Laboratory
API
Donate
Inventory
BuyNow!
Chat
Share
Language
Calculator
Utilities
Online Simulator:
EasyEDA
PartSim
EveryCircuit
Circuit Lab

Cloud Storage:
Google Drive
OneDrive
Dropbox
iCloud
LSi *VREF SDi *CHCLK 4.7 k 1 F 85.3 kHz STATE SELECTION C2i VREGi CHSi BGNDi 4148-SOT VSW * Note: * denotes pins that are common to both channels. i = per channel component. 18 VDC 20 k C1i AGND* 1 2 1.5 F IMTi 1 nF To base of QSW on other channel Fi RDCi BAV99TA FZT955 2.0 F 300 V CFILT i 0.1 27 nF 150 H VREF 280 k FSET* 2.0 F 300 V VIN LPFi Ai (TIP) TIPi 0.1 F Place close to VSW pin VREF 4.7 F Le77D11 VE770 Series Data Sheet C3i NPRFILT i 100 nF 16 V SINGLE CHANNEL APPLICATION CIRCUIT RSA1i RSA2i RSB1i RSB2i 3.3 V 3.3 V PTC1i TIPi RINGi 1 K1 K1 2 G A 3 NC 4 K2 U3 A K2 CLPFi C4 8 + VINi Ai (TIP) 6 Bi (RING) RLIMi CSW1 CSW CVREG1 CESRi CFILTi VSW* Fi + Place close to VSW pin CBDi DSWi CFL1 CFL2 U1 Le77D11 DD2 - LVREGi FSET* QSWi LSWi RBDi CVREGi RDCi DGND1 ILSi *VREF SDi *CHCLK VREGi CHSi AGND* CHSi BGNDi 1 2 VDCi TSCA DRA DXA FS PCLK U2 Le78D11 VREF CHCLK C1i C1i C2i C2i C3i C3i NPRFILTi VSi IREF MCLK DCLK CSL DIN DOUT INT RS PCM Interface MPI Interface RREF DD1 To base of QSW on other channel F
24 Pages, 372 KB, Original
in. 7. When On Hook, RLDC is open circuit, RLAC = 600 . Le77D11 VoSLICTM Data Sheet 17 P R E L I M I N A R Y TEST CIRCUIT Per Channel VCC 100 nF 16 V + VCC* ILOOP TIPi - VIN i RL VOUT i Bi (RING) VSW 100 k VHP i 280 k FSET * CFILT i 10 nF VSW* 220 F + 0.1 BAV99TA - 22 F 100 V U1 Le77D11 330 ES2C 47 H - + 22 F + 100 V ILS i *VREF SD i *CHCLK 4.7 k 1 F 85.3 kHz STATE SELECTION C2 i VREG i CHS i BGND i 1 nF 4148-SOT VSW * Note: * denotes pins that are common to both channels. i = per channel component. 18 VDC 20 k C1 i 100 nF AGND* 1 2 1.5 F IMT i - To base of QSW on other channel Fi VREF RDC i FZT953 18 H VIN LPFi Ai (TIP) RINGi 0.1 F Place close to VSW pin VREF 4.7 F Le77D11 VoSLICTM Data Sheet C3 i NPRFILT i 100 nF 16 V NC K2 3 4 C FLi G 2 1 2 DD1 + - D SWi VSW K2 A A K1 U3 C SW K1 1 Protection is voltage tracking device. i = per channel component. C VREGi R BDi CBDi R RAMP C4 VCC* LPF i + - C LPFi C HSi CHS i AGND* VREG i 19 R VSi C3 i NPRFILT i C2 i C3 i C2 i C1 i CHCLK SD i C1 i VREF *VREF *CH
23 Pages, 377 KB, Original
SW* 220 F 100 nF + 1.5 F 10 nF FZT953 - + 22 F 100 V - + ILSi Fi SDi 330 100 nF *VRINGM *RDC 1 2 47 nF VSW * 470pF 85 kHz 2N3904 34.8 k RTRIP i To base of QSW on other channel 10 k *VRAMP VREGi 47 H 4148-SOT VRING *VRINGP 536k 22 F 100 V ES2C VHPi CFILT i BAV99TA - 18 H U1 Le9502 AGND* BGNDi C1i C2i CHSi STATE SELECTION 1 nF Note: * Denotes pins that are common to both channels. i = per channel component/pin Le9502 VoiceChipTM 95R Series SLIC Data Sheet 19 APPLICATION CIRCUIT 3.3 V CLPFi C1 PTC 1i 1 TIPi RINGi K1 2 G 3 NC 4 K2 A U3 + 8 K1 A 7 VCC* 6 Ai (TIP) CHSi VSW RLIMi RDC - DSWi LVREGi + - CFLi RDC* U1 Le9502 VSW* + DAC Outputs Q SWi CVREGi VHPi CFILT i CHPi ILSi DAC Outputs Logic Inputs DET i SDi C1i VREGi AGND* Logic Outputs C2i VRAMP* BGNDi Clock Output (CHCLK) RTRIP i RSET To base of QSW on other channel 1 2 RCLK CTRIPi Q RAMP VSW * CRAMP R TRIPi Note: * Denotes pins that are common to both channels. ** VCM is the bias voltage, which is (maximum ADC input voltage / 2) 20 Le9502 VoiceChip
25 Pages, 430 KB, Original
ESC2 RL 280 k 100 nF 16 V VCC VCC* - 18 1 nF AGND* CHSi VREGi SDi ILSi BGNDi C3i NPRFILT i C2i C1i *CHCLK *VREF IMTi RDCi Fi VSW* VHPi VOUT i VINi CFILT i U1 Le77D11 LPFi + 4.7 F FSET* Bi (RING) Ai (TIP) Zarlink Semiconductor Inc. CVREGi 100 nF 180 27 nF BAV99TA 0.1 ILOOP FZT955 CSW + 220 F - VSW RINGi TIPi 2.0 F 300 V 0.1 F Place close to VSW pin * denotes pins that are common to both channels. Note: Per Channel TEST CIRCUIT Le77D11 100 nF 16 V 1 F 20 k 1.5 F 100 k VREF 85.3 kHz STATE SELECTION 4.7 k VDC VIN VREF Data Sheet G NC K2 2 3 4 1 2 DD1 CFL1 CFL2 DSWi - + VSW K2 A A K1 U3 CSW K1 1 CESRi is located close to gate on U3. Protection is voltage tracking device. i = per channel component. QSWi DD2 RSB2i RSA2i RLIMi VSW * LSWi 5 6 7 8 * Denotes pins that are common to both channels. Note: CESRi LVREGi Place close to VSW pin CSW1 PTC2i To base of QSW on other channel CVREG1 RINGi TIPi PTC1i RSB1i RSA1i CVREGi RBDi VCC* LPFi + - CLPFi CHSi 19 NPRFILTi C3i RVSi C3i C2i CHCLK VREF IMTi VDCi Fi C2
23 Pages, 438 KB, Original
C60-63 HIP6601ECB 1F C4 U2 FIGURE 11. SCHEMATIC DIAGRAM OF A 40A SUPPLY USING THE ISL6560 CONTROLLER AND HIP6601 GATE DRIVERS To CORE Plan 12V 4.7F C43 SW4 1 VDD LO 8 2 HB VSS 7 3 HO LI 6 4 HS HI 5 10k R29 HIP2100 U4 732 R26 324 R16 732 R32 D1 Q9 HUF78129 BAV99TA D2 SW4A 12V 46.4k R19 10k R28 402 R20 Q7 2N7002 HUF78129 Q8 324 R18 BAV99TA R22 0.05 Current Monitoring 10mV / Amp R30 100 R23 33.2 TP14 R31 100 R24 0.05 10F C44 To CORE GND Plan FIGURE 12. SCHEMATIC DIAGRAM OF THE 40A PULSE GENERATOR ON THE POWER SUPPLY BOARD 5 ISL6560/62 Evaluation Board To PWRGD Pin 10 12V 120k R9 GREEN LED 1 RED 3.3k R8 3.3k R10 Q5 2N7002 Q6 2N7002 LED 1A FIGURE 13. SCHEMATIC DIAGRAM OF THE POWER GOOD MONITORING CIRCUIT CAll 1-888 Intersil C FIGURE 14. SILK SCREEN 6 ISL6560/62 Evaluation Board FIGURE 15A. TOP COPPER FIGURE 15C. POWER PLAN FIGURE 15B. GROUND PLAN FIGURE 15D. BOTTOM COPPER FIGURES 15A-D. Showing ALL FOUR LAYERS OF THE PC BOARD 7 ISL6560/62 Evaluation Board TABLE 1. Bill of Materials Quanti
11 Pages, 713 KB, Original
on Board Schematics Date: 2 Document Number Rev D Wednesday, May 22, 2002 Sheet 1 3 of 5 L E 7 1H E 00 11 E V A LUA TIO N BO A RD RE V. D 1 US E R 'S G U ID E 5 VSW 4 3 2 1 VSW Bipolar Switcher D D 2 3 LSW1 47uH DR127-680 VSW 1 2 SD1 CBD1 10nF QS1 1 BAV99TA + 330 Ohm 1% LVREG1 2 DIODE ES2C C 2 1 B QSW1 FZT95 3 3E RBD1 SD1 See Note DSW1 1 CFL1 22uF 100V VBAT_T RACK1 18uH 1210 CVREG1 100nF 100V CFL11 100nF 100V + BGND DD2 CVREG11 22uF 100V ILS1 BGND C RLIM1 0.1 Ohms 1/2W 1% ILS1 + VSW 220uF ALUM. ELEC. DD1 C VREGP1 CSW1 1 BGND CSW1 1 100nF BGND 3 VSW 2 4148CC-S OT ALUM. ELEC. + CSW2 220uF RLIM2 0.1 Ohms 1/2W 1% ILS2 CSW2 2 100nF BGND VREGP2 ILS2 3 E 1 B SD2 330 Ohm 1% DSW2 CBD2 10nF 1 DD3 See Note LVREG2 2 2 1 DIODE ES2C 1 3 B VSW LSW2 47uH DR127-680 BAV99TA + SD2 QSW2 FZT95 3 C 2 QS2 2 BGND CFL2 22uF 100V VBAT_T RACK2 18uH 1210 CVREG2 100nF 100V CFL22 100nF 100V + RBD2 CVREG22 22uF 100V B BGND BGND A A Notes: 1). CFL11 and CFL22 are not populated on the evaluation board. They ar
26 Pages, 435 KB, Original
VREF SDi *CHCLK 85.3 kHz STATE SELECTION C2i VREGi CHSi BGNDi C3i NPRFILT i 4148-SOT VSW * Note: * denotes pins that are common to both channels. i = per channel component. 18 1 F C1i AGND* 1 2 4.7 k IMTi 1 nF To base of QSW on other channel VDC 20 k RDCi BAV99TA FZT955 2.0 F 300 V CFILT i 0.1 27 nF 150 H VREF 280 k FSET* 2.0 F 300 V VIN LPFi Ai (TIP) TIPi 0.1 F Place close to VSW pin VREF 4.7 F Le77D11 VoiceChipTM Family 770 Series SLIC Data Sheet 100 nF 16 V SINGLE CHANNEL APPLICATION CIRCUIT RSA1i RSA2i RSB1i RSB2i 3.3 V 3.3 V PTC1i TIPi RINGi 1 K1 K1 2 G A 3 NC 4 K2 U3 A K2 CLPFi C4 8 + VINi Ai (TIP) 6 Bi (RING) RLIMi CSW1 CSW CVREG1 CESRi CFILTi VSW* Fi + Place close to VSW pin CBDi DSWi CFL1 CFL2 U1 Le77D11 DD2 - LVREGi FSET* QSWi LSWi RBDi CVREGi RDCi DGND1 ILSi *VREF SDi *CHCLK VREGi CHSi AGND* CHSi BGNDi Fi VDCi 1 2 TSCA DRA DXA FS PCLK U2 Le78D11 IMTi VREF CHCLK C1i C1i C2i C2i C3i C3i NPRFILTi CNPRi (optional) VSi IREF MCLK DCLK CSL DIN DOUT INT RS PCM Interface MPI Interface RREF DD1
24 Pages, 446 KB, Original
C60-63 HIP6601ECB 1F C4 U2 FIGURE 11. SCHEMATIC DIAGRAM OF A 40A SUPPLY USING THE ISL6560 CONTROLLER AND HIP6601 GATE DRIVERS To CORE Plan 12V 4.7F C43 SW4 1 VDD LO 8 2 HB VSS 7 3 HO LI 6 4 HS HI 5 10k R29 HIP2100 U4 732 R26 324 R16 732 R32 D1 Q9 HUF78129 BAV99TA D2 SW4A 12V 46.4k R19 10k R28 402 R20 Q7 2N7002 HUF78129 Q8 324 R18 BAV99TA R22 0.05 Current Monitoring 10mV / Amp R30 100 R23 33.2 TP14 R31 100 R24 0.05 10F C44 To CORE GND Plan FIGURE 12. SCHEMATIC DIAGRAM OF THE 40A PULSE GENERATOR ON THE POWER SUPPLY BOARD 5 ISL6560/62 Evaluation Board To PWRGD Pin 10 12V 120k R9 GREEN LED 1 RED 3.3k R8 3.3k R10 Q5 2N7002 Q6 2N7002 LED 1A FIGURE 13. SCHEMATIC DIAGRAM OF THE POWER GOOD MONITORING CIRCUIT CAll 1-888 Intersil C FIGURE 14. SILK SCREEN 6 ISL6560/62 Evaluation Board FIGURE 15A. TOP COPPER FIGURE 15C. POWER PLAN FIGURE 15B. GROUND PLAN FIGURE 15D. BOTTOM COPPER FIGURES 15A-D. Showing ALL FOUR LAYERS OF THE PC BOARD 7 ISL6560/62 Evaluation Board TABLE 1. Bill of Materials Quanti
12 Pages, 718 KB, Original
LSi *VREF SDi *CHCLK 4.7 k 1 F 85.3 kHz STATE SELECTION C2i VREGi CHSi BGNDi 4148-SOT VSW * Note: * denotes pins that are common to both channels. i = per channel component. 18 VDC 20 k C1i AGND* 1 2 1.5 F IMTi 1 nF To base of QSW on other channel Fi RDCi BAV99TA FZT955 2.0 F 300 V CFILT i 0.1 27 nF 150 H VREF 280 k FSET* 2.0 F 300 V VIN LPFi Ai (TIP) TIPi 0.1 F Place close to VSW pin VREF 4.7 F Le77D11 VE770 Series Data Sheet C3i NPRFILT i 100 nF 16 V SINGLE CHANNEL APPLICATION CIRCUIT RSA1i RSA2i RSB1i RSB2i 3.3 V 3.3 V PTC1i TIPi RINGi 1 K1 K1 2 G A 3 NC 4 K2 U3 A K2 CLPFi C4 8 + VINi Ai (TIP) 6 Bi (RING) RLIMi CSW1 CSW CVREG1 CESRi CFILTi VSW* Fi + Place close to VSW pin CBDi DSWi CFL1 CFL2 U1 Le77D11 DD2 - LVREGi FSET* QSWi LSWi RBDi CVREGi RDCi DGND1 ILSi *VREF SDi *CHCLK VREGi CHSi AGND* CHSi BGNDi 1 2 VDCi TSCA DRA DXA FS PCLK U2 Le78D11 VREF CHCLK C1i C1i C2i C2i C3i C3i NPRFILTi VSi IREF MCLK DCLK CSL DIN DOUT INT RS PCM Interface MPI Interface RREF DD1 To base of QSW on other channel F
25 Pages, 399 KB, Original
When On Hook, RLDC is open circuit, RLAC = 600 . Le77D11 VoiceChipTM Family 770 Series SLIC Data Sheet 17 TEST CIRCUIT Per Channel VCC 100 nF 16 V + VCC* ILOOP TIPi - VIN i VOUT i RINGi Bi (RING) VSW 100 k VHP i 280 k FSET * CFILT i 10 nF VSW* 220 F + 0.1 BAV99TA - 22 F 100 V U1 Le77D11 VREF 1.5 F Fi 330 ES2C 47 H - + 22 F + 100 V ILS i *VREF SD i *CHCLK 85.3 kHz STATE SELECTION C2 i VREG i CHS i BGND i C3 i NPRFILT i 1 nF 4148-SOT VSW * Note: * denotes pins that are common to both channels. i = per channel component. 18 1 F C1 i 100 nF AGND* 1 2 4.7 k IMT i - To base of QSW on other channel VDC 20 k RDC i FZT953 18 H VIN LPFi Ai (TIP) RL 0.1 F Place close to VSW pin VREF 4.7 F Le77D11 VoiceChipTM Family 770 Series SLIC Data Sheet 100 nF 16 V SINGLE CHANNEL APPLICATION CIRCUIT R SA1i R SA2i R SB1i R SB2i 3.3 V 3.3 V PTC 1i TIPi RINGi 1 K1 2 G 8 K1 3 NC 4 K2 U3 + A 6 A i (TIP) 5 B i (RING) R LIMi C SW1 C SW CBDi D SWi LVREGi + - C FLi CFILT i VSW* Fi + U1 Le77D11 DD2 - C VREG11 FSET * Q SWi R BDi
24 Pages, 421 KB, Original
18 TEST CIRCUIT 2.0 F 300 V - + 300 V 0.1 VSW CVREG 100 nF VCC 1 nF AGND CHS VREG SD ILS VSW FSET B (RING) A (TIP) - BGND U1 Le77S11 LPF + 4.7 F C2 C1 CHCLK VREF IMT RDC F CFILT VHP VOUT VIN C3 NPRFILT Le77S11 VE770 Series SLIC Data Sheet 180 27 nF 280 k BAV99TA ILOOP LSW 47 H FZT955 - + RL 4148-SOT + - ES2C CSW 220 F 2.0 F 150 H 0.1 F Place close to VSW pin VSW RING TIP 100 nF 16 V VCC 100 nF 16 V 1 F 20 k 1.5 F 100 k 4.7 k VREF 85.3 kHz STATE SELECTION VDC VIN VREF CESR LVREG Place close to VSW pin CSW1 PTC NC K2 3 4 CFL1 G 2 CESR is located close to gate on U3. K2 A A K1 DD1 CFL2 DSW VSW U3 CSW K1 RSB1 RSA1 1 Protection is voltage tracking device. Note: CVREG1 RING TIP PTC APPLICATION CIRCUIT VSW LSW QSW - + 5 6 7 8 - CLPF CHS CHS AGND VREG NPRFILT C3 RVS C3 C2 CHCLK VREF IMT VDC F C2 CNPR (optional) ROUT C1 RDC CHP RIMT VIN VOUT VB VA C1 VREF CHCLK SD IMT ILS BGND F RDC CFILT VSW VHP VOUT VIN FSET U1 Le77S11 B (RING) LPF + Le77S11 VE770 Series SLIC Data Sheet CVREG RBD VCC A (TIP) 3.3 V CBD
24 Pages, 737 KB, Original
ESC2 RL 280 k 100 nF 16 V VCC VCC* - 18 1 nF AGND* CHSi VREGi SDi ILSi BGNDi C3i NPRFILT i C2i C1i *CHCLK *VREF IMTi RDCi Fi VSW* VHPi VOUT i VINi CFILT i U1 Le77D11 LPFi + 4.7 F FSET* Bi (RING) Ai (TIP) Zarlink Semiconductor Inc. CVREGi 100 nF 180 27 nF BAV99TA 0.1 ILOOP FZT955 CSW + 220 F - VSW RINGi TIPi 2.0 F 300 V 0.1 F Place close to VSW pin * denotes pins that are common to both channels. Note: Per Channel TEST CIRCUIT Le77D11 100 nF 16 V 1 F 20 k 1.5 F 100 k VREF 85.3 kHz STATE SELECTION 4.7 k VDC VIN VREF Data Sheet G NC K2 2 3 4 1 2 DD1 CFL1 CFL2 DSWi - + VSW K2 A A K1 U3 CSW K1 1 CESRi is located close to gate on U3. Protection is voltage tracking device. i = per channel component. QSWi DD2 RSB2i RSA2i RLIMi VSW * LSWi 5 6 7 8 * Denotes pins that are common to both channels. Note: CESRi LVREGi Place close to VSW pin CSW1 PTC2i To base of QSW on other channel CVREG1 RINGi TIPi PTC1i RSB1i RSA1i CVREGi RBDi VCC* LPFi + - CLPFi CHSi 19 NPRFILTi C3i RVSi C3i C2i CHCLK VREF IMTi VDCi Fi C2
23 Pages, 365 KB, Original
v 16 2 D2, D1 CMPD2004S 1808 20% 3KV X7R MFR PART NUMBER Required to be Y2-compliant capacitors 20% 16v TANT Case A 1812 3KV X7R SOT-23 Required to be Y2-compliant capacitors Central Semi Diodes Inc BAV99-7 17 2 D4, D3 BAV99 SOT-23 On Semi Fairchild Zetex BAV99TA 18 2 FB2, FB1 Fbead 0805 19 2 L1, L2 330H 20 2 Q3, Q1 MMBTA42LT1 SOT-23 21 1 Q2 MMBTA92LT1 SOT-23 22 1 Q4 BCP56T1 NPN 60v 1/2W SOT-223 23 1 RV1 275V/100A 24 1 R2 402 25 1 R5 100k 0603 1% 1/16W 26 1 R6 120k 0603 5% 1/16W 27 6 R7, R8, R15, R16, R17, R19 5.36k 1210 1% 1/4W 28 2 R9, R10 56K 0805 5% 1/10W 29 1 R11 9.31K 0603 1% 1/16W 30 1 R12 78.7 0603 1% 1/16W 31 1 R13 215 0603 1% 1/16W 32 1 R18 2.2k 0805 5% 1/10W Murata BLM21B102S Sporton RCP0408-301K01 DO-214AA ST SMP100-270LC Teccor P3100SB 1206 1% 1/8W 1210 (SMTPCB pads) D6 is required only if C1A5V is not greater than DVDD - 0.5 V during power-up, see Section 5.2, Recommended Operating Conditions. NOTE: Contact Texas Instruments to obtain an Excel spreadsheet version of this Bill of Mat
175 Pages, 2471 KB, Original
v 16 2 D2, D1 CMPD2004S 1808 20% 3KV X7R MFR PART NUMBER Required to be Y2-compliant capacitors 20% 16v TANT Case A 1812 3KV X7R SOT-23 Required to be Y2-compliant capacitors Central Semi Diodes Inc BAV99-7 17 2 D4, D3 BAV99 SOT-23 On Semi Fairchild Zetex BAV99TA 18 2 FB2, FB1 Fbead 0805 19 2 L1, L2 330H 20 2 Q3, Q1 MMBTA42LT1 SOT-23 21 1 Q2 MMBTA92LT1 SOT-23 22 1 Q4 BCP56T1 NPN 60v 1/2W SOT-223 23 1 RV1 275V/100A 24 1 R2 402 25 1 R5 100k 0603 1% 1/16W 26 1 R6 120k 0603 5% 1/16W 27 6 R7, R8, R15, R16, R17, R19 5.36k 1210 1% 1/4W 28 2 R9, R10 56K 0805 5% 1/10W 29 1 R11 9.31K 0603 1% 1/16W 30 1 R12 78.7 0603 1% 1/16W 31 1 R13 215 0603 1% 1/16W 32 1 R18 2.2k 0805 5% 1/10W Murata BLM21B102S Sporton RCP0408-301K01 DO-214AA ST SMP100-270LC Teccor P3100SB 1206 1% 1/8W 1210 (SMTPCB pads) D6 is required only if C1A5V is not greater than DVDD - 0.5 V during power-up, see Section 5.2, Recommended Operating Conditions. NOTE: Contact Texas Instruments to obtain an Excel spreadsheet version of this Bill of Mat
177 Pages, 2655 KB, Original
6v X7R 11 1 C22 1.8nF 0603 20% 50V X7R 12 2 C24, C25 1000pF 13 1 C36 22F A case 6.3v 14 2 C39, C38 15pF 0603 5% 50v NPO 15 1 C40 2.2F A case 6.3v 16 2 D2, D1 CMPD2004S SOT-23 Central Semi 17 2 D4, D3 BAV99 SOT-23 Diodes Inc BAV99-7 On Semi Fairchild Zetex BAV99TA 18 2 FB2, FB1 Fbead 0805 Murata BLM21B102S 19 2 L1, L2 330H 20 2 Q3, Q1 MMBTA42LT1 SOT-23 21 1 Q2 MMBTA92LT1 SOT-23 22 1 Q4 BCP56T1 NPN 60v 1/2W SOT-223 23 1 RV1 275V/100A 24 1 R2 402 1206 1% 1/8W 1210 (SMTPCB pads) 25 1 R5 100k 0603 1% 1/16W 26 1 R6 120k 0603 5% 1/16W 27 6 R7, R8, R15, R16, R17, R19 5.36k 1210 1% 1/4W 28 2 R9, R10 56K 0805 5% 1/10W 29 1 R11 9.31K 0603 1% 1/16W 30 1 R12 78.7 0603 1% 1/16W 20% 16v TANT Case A 1812 3KV X7R Required to be Y2-compliant capacitors Sporton RCP0408-301K01 DO-214AA ST SMP100-270LC Teccor P3100SB D5 only required if C1A5V is not > DVDD - 0.5 V during power up, see the Recommended Operating Conditions table. NOTE: Contact Texas Instruments to obtain an Excel spreadsheet version of this Bill of Mat
88 Pages, 1344 KB, Original
© 2023 Datasheet.Directory

Suppliers Inquiry

Previous Next

Maximum allowed file size is 10MB

scientific-calculator